The present invention relates to a circuit arrangement for conversion of an input current signal to a corresponding digital output signal, and relates in particular to the detection of very small currents and to their conversion to digital output signals by means of a tracking analog/digital converter.
Although it can be applied to any desired circuit arrangements or systems, the present invention and the problems on which it is based are explained with reference to current/voltage conversion at a low-capacitance circuit node, specifically for use in a tracking analog/digital converter with a current input and resolution in the nA range.
Circuit arrangements for conversion of analog input signals to digital output signals are generally known, for example as described in xe2x80x9cProfos/Pfeifer, Handbuch der Messtechnik [Instrumentation Manual], Oldenbourg Verlag, 1992, pages 284-289xe2x80x9d. In particular, tracking analog/digital converters are also known, as described, for example, in xe2x80x9cE. Schrxc3xcifer, Elektrische Messtechnik [Electrical Instrumentation], Hanser Verlag, 1995, pages 351-352xe2x80x9d. Such conventional tracking analog/digital converters admittedly offer a certain improvement in terms of the conversion rate over incremental analog/digital step converters, which are likewise known and in which the digital output value is always approximated starting at zero. Incremental analog/digital step converters are described, for example, in xe2x80x9cE. Schrxc3xcifer, Elektrische Messtechnik [Electrical Instrumentation], Hanser Verlag, 1995, pages 350-351xe2x80x9d.
FIG. 4 shows a block diagram of a tracking analog/digital converter according to the prior art. In tracking analog/digital converters, the digital output signal 43 is produced by a count of a counting device 46. The counting device 46 is, for example, in the form of an up/down counter.
Control of the counting device 46 by means of a control signal 45 is described in detail in the following text.
A summation device 401 has at least two inputs, of which one input is inverted (xe2x88x92). A non-inverting input is supplied with an analog input signal 41. An inverting input is supplied with an analog feedback signal 402. One output of the summation device 401 is connected to one input of a comparator 44, to which a comparator input signal 403 is supplied which corresponds to a summation of the non-inverted analog input signal and of the inverted analog feedback signal 402.
One output of the comparator 44 is connected to one input of the counting device 46, with the counting device 46 being supplied with a control signal 45 from the output of the comparator 44. One output of the counting device 46 is connected to one input of a digital/analog converter 42, to which a digital output signal 43 is supplied. The digital/analog converter 42 converts the digital output signal 43 to an analog feedback signal 402, which is in turn supplied to the inverting input (xe2x88x92) of the summation device 401.
In the conventional tracking analog/digital converter shown in FIG. 4, the comparator 44 together with the summation device 401 determines whether an analog input signal 41 is greater than or less than an analog feedback signal 402. For this purpose, the summation device 401 adds the analog input signal 41 and the inverted (minus sign in FIG. 4) analog feedback signal 402. In this way, the two following sequences ((i) and (ii)) are possible:
(i) The analog input signal 41 is greater than the analog feedback signal 402: the comparator input signal 403 is positive, which results in the counting device 46 counting upward. This increases the count of the counting device 46, and thus the digital output signal 43. After digital/analog conversion of the digital output signal 43 in the digital/analog converter 42, the analog feedback signal 402 is thus also increased. This process is continued until the analog feedback signal 402 corresponds to the analog input signal 41.
(ii) The analog input signal 41 is less than the analog feedback signal 402: the comparator input signal 403 is negative, which results in the counting device 46 counting downward. This reduces the count of the counting device 46, and thus the digital output signal 43. After digital/analog conversion of the digital output signal 43 in the digital/analog converter 42, the analog feedback signal 402 is thus also reduced. This process is continued until the analog feedback signal 402 corresponds to the analog input signal 41.
It can clearly be seen by comparison of the two sequences (i) and (ii) that the digital output signal 43 from the counting device 46 follows the analog input signal 41 in time with the clock which is defined by the clock signal 47 and, finally, on reaching a count which corresponds to the analog input signal 41, fluctuates about the least significant bit (LSB) of the counting device. It can likewise be seen that the count of the counting device 46, and hence the digital output signal 43, can vary only by one LSB per clock cycle. In order to allow fast analog/digital conversion to be carried out, the clock cycle should be short, or the clock rate of the clock signal 47 should be high.
The clock rate is supplied to a first input of the counting device 46 by means of a clock signal 47. The control signal 45, which is supplied to a second input of the counting device, defines the counting direction.
The clock rate is essentially limited by the presence of parasitic effects.
FIG. 3 shows a converter device according to the prior art for provision of an analog voltage which is further processed by a comparator in a downstream tracking analog/digital converter. In this case, direct current/voltage conversion is carried out at an input circuit node 12a. For this purpose, the input circuit node 12a is supplied with an input current signal 11. A difference current signal 14 and a feedback current signal 13 are produced by the input circuit node 12a. There is a total parasitic capacitance 31, which is generally high, between the input circuit node 12a and ground 33. Furthermore, there is a resistance element 32 between the input node 12a and a defined, constant voltage. In this conventional circuit arrangement, the resistance element 32 is used to carry out current/voltage conversion. In this way, the difference current signal 14 is converted to a comparator input signal 403, which represents an analog voltage. This analog voltage forms an input signal for a downstream comparator 44 (shown in FIGS. 4 and 5), which the comparator input signal 403 then compares with a reference voltage.
Conventional tracking analog/digital converters at the input node 12a limit the conversion rate.
The difference current signal must be converted to a voltage which can be further-processed in a comparator that follows in the signal flow plan. In this case, one problem that arises is that the voltage change which occurs across the resistance element as a result of the voltage drop of the difference current signal is applied to the input circuit node 12a, which is subject to a parasitic capacitance of unknown magnitude, which is generally high, and this leads to a time delay as a result of the charge-reversal effects in this parasitic capacitance.
Conventional tracking analog/digital converters also have a further disadvantage in that large errors occur in the detection of very small currents, of less than 1 nA during conventional current/voltage conversion.
Yet another disadvantage of conventional tracking analog/digital converters is that the voltage change in the difference current signal is applied to a node which is subject to parasitic capacitances, and that the charge reversal in the parasitic capacitances results in a time delay, in which case the comparator has to make a decision in each clock cycle and therefore has to wait for the voltage change at a reference circuit node.
The invention is thus based on the object of providing a circuit arrangement which converts an input current signal to a digital output signal quickly and without the disadvantageous influence of parasitic effects on the conversion rate.
According to the invention, said object is achieved by a converter device for conversion of the analog input current signal to a corresponding analog voltage, with the output of the converter device being connected to a reference circuit node, which is designed to have low capacitance, and the input circuit node 12a being kept at a constant voltage.
Accordingly, one advantage of the invention is that the rate for conversion of an analog input current signal to a digital output signal is greater than that with conventional circuit arrangements for analog/digital conversion, since parasitic effects on the input circuit node do not lead to any time delay in a comparator input signal.
The essence of the invention is a converter device which allows an input current signal, which is applied to an input circuit node and is subject to parasitic capacitances by virtue of the circuitry, to be converted to an output signal which is produced at a reference circuit node which has no parasitic capacitances, or negligibly small parasitic capacitances, with the input circuit node 12a being kept at a constant voltage, as a result of which the parasitic capacitances at the input circuit node do not have any negative effect. The conversion rate of a downstream analog/digital converter which is connected to the reference circuit node can in this way be increased in comparison to that of circuit arrangements according to the prior art.
Advantageous developments and improvements of the respective subject matter of the invention can be found in the dependent claims.
According to one preferred development, the converter device has a field-effect transistor whose gate-source voltage results in a constant voltage with respect to ground being applied to the input circuit node, and with a reference circuit node being designed to have low capacitance. In this case, a transimpedance resistance element is connected between the input circuit nodes and the reference circuit nodes, with the reference circuit node being connected to a defined potential via a current source or a resistor.
According to a further preferred development, the converter device has an operational amplifier which is fed back to a transimpedance resistance element. In this case, one inverting input of the operational amplifier is connected to the input circuit node, while the other input of the operational amplifier is kept at a reference voltage by means of a reference voltage source.
According to a further preferred development, a bipolar transistor is used instead of a field-effect transistor.
According to a further preferred development, the transimpedance resistance element is in the form of an active load which is formed, for example, by transistors or other circuit elements.